delayed control-transfer

(SPARC, programming)A technique used on the SPARC to reducethe effect of pipeline breaks by executing the instructionafter a branch instruction (the "delay instruction" in the"delay slot"). If there is no useful instruction which can beplaced in the delay slot then the "annul bit" on the controltransfer instruction can be set, preventing execution of thedelay instruction (unless the control transfer is conditionaland is taken).

Annulled branches are indicated in SPARC assembler language byappending ",A" to the operation code. For example,

LOOP: ...CMP %L0,10BLE,A LOOPADD %L2, %L3, #L4

If the delay instruction is also a control transferinstruction then it gets more complicated. Both controltransfer instructions are executed (but not the followinginstruction) and, assuming they are both taken, control istransferred briefly to the destination of the first and thenimmediately to the destination of the second.

单词	delayed control-transfer
释义	delayed control-transfer delayed control-transfer (SPARC, programming)A technique used on the SPARC to reducethe effect of pipeline breaks by executing the instructionafter a branch instruction (the "delay instruction" in the"delay slot"). If there is no useful instruction which can beplaced in the delay slot then the "annul bit" on the controltransfer instruction can be set, preventing execution of thedelay instruction (unless the control transfer is conditionaland is taken). Annulled branches are indicated in SPARC assembler language byappending ",A" to the operation code. For example, LOOP: ...CMP %L0,10BLE,A LOOPADD %L2, %L3, #L4 If the delay instruction is also a control transferinstruction then it gets more complicated. Both controltransfer instructions are executed (but not the followinginstruction) and, assuming they are both taken, control istransferred briefly to the destination of the first and thenimmediately to the destination of the second.
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